Normal operation of conventional linear voltage regulators, such as those of the 78XX series, requires an input voltage that is at least 2-3 V higher than the output voltage. For some power supplies, this requirement is too harsh. For example, a 5 V power supply could not be converted to 3.3V by using a conventional linear regulator because a voltage difference between the input and output is only 1.7V, which does not meet the aforesaid requirement.
To this end, low drop-out (LDO) voltage converters have been developed. An LDO converter is a linear voltage regulator that employs a transistor or field effect transistor (FET) operating in its linear region and can remove an excess voltage from the input voltage so as to generate a regulated output voltage. LDO regulators have a range of outstanding advantages over conventional linear voltage regulators, such as lower costs, lower noises and lower quiescent currents. These advantages are essentially offered by P-channel MOSFETs employed in the LDO linear voltage regulators, compared to PNP transistors in the conventional linear voltage regulators. As P-channel MOSFETs are voltage-driven devices without the need for currents, the current consumption in LDO regulators are much lower. In addition, the use of a PNP transistor requires a voltage drop between the input and output voltages that is not lower than a certain value in order to prevent saturation of the PNP transistor which is detrimental to the output capabilities. In contrast, a voltage drop across a P-channel MOSFET is roughly equal to the product of the output current and the on-resistance. As most MOSFETs are low in on-resistance, voltage drops across them are often very low. However, as a drive voltage for a P-channel MOSFET is equal to its gate-source voltage minus the threshold voltage, i.e., the supply voltage minus the threshold voltage, when driving a PMOS with a low supply voltage, it requires the PMOS to have a large size so as to have a low threshold voltage.